Summary
Proteus Virtual System Modelling (VSM) combines mixed mode SPICE circuit simulation, animated components and microprocessor models to facilitate co-simulation of complete microcontroller based designs.
The ‘Proteus VSM for PIC24’ product includes the following main software modules:
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Proteus VSM for PIC® Bundle products are ideal if you need to simulate more than one family of PIC micro-controllers.
Variants
The following is a current list of supported variants in the PIC24 family:
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Features
We believe our simulation models are the most accurate and the most complete on the market today. A summary of model capabilities is listed below:
- Supports the entire instruction set.
- Supports all port and other I/O pin operations.
- Supports all timers including watchdog timer, sleep mode and wake-up from sleep.
- Supports both Capture-Compare and PWM modules in all modes.
- Supports Parallel Master Port (PMP) module including legacy PSP modes.
- Supports all serial communication peripherals including SPI, I2C and UART.
- Supports Analogue-to-Digital Conversion (ADC) module including support for voltage reference pins.
- Supports Analogue Comparator modules including support for internal and external voltage references.
- Supports the CTMU (Charge Time Measurement Unit) features.
- Supports Real Time Clock including automatic initialisation from the PC time.
- Supports 16-bit Programmable Cyclic Redundancy Check (CRC-16) Generator for appropriate variants.
- Supports all interrupt modes including interrupt priorities.
- Support for the Peripheral Pin Select module on low pincount devices.
- Support for extended instruction set for appropriate variants.
- Support for 256 words (512 bytes) EEPROM for appropriate variants.
- Provides internal consistency checks on code (e.g. execution of invalid op-codes, illegal memory accesses, stack overflow checking, etc.).
- Fully integrated in to the VSM source level debugging system.
- Fully integrated into the Proteus Diagnostic Control System.
Limitations
The following is a listing of known limitations in the current version of the PIC24:
- The following “core” registers are either not modelled at all. Functionality enabled by these registers is therefore not available: DISICNT, ODCx, CLKDIV, OSCTUN, PMDx.
- The OSCCON register not modelled except for the SOSCEN bit (which must be set to enable the secondary oscillator for use by either timer 1 or the Real Time Clock Module)
- Brown-out detection is not modelled.
- The A/D converted Cad capacitance is not modelled. Whether the effects of Cad have to be taken into the account for CTMU calibration purposes then an external capacitor must be used.
- The SPI modules do not currently support either “enhanced” mode (FIFO buffering) or “framing” modes (essentially, any feature enabled via SPIxCON2).
- The 32-bit Programmable Cyclic Redundancy Check (CRC-32) Generator is not modelled yet.
Compilers
Supported Third Party Compilers
Proteus VSM models will fundamentally work with the exact same HEX file as you would program the physical device with. However, far more debugging information is available when using a compiler to write the firmware and providing these object files to Proteus in place of the HEX file provides a much richer working environment.
We recommend you use the free Labcenter VSM Studio IDE. This will greatly simplify the task as it will automatically configure supported compilers to work with a Proteus VSM simulation.
If you prefer to work inside your own IDE then you will need to set your compiler options manually. After compiling for debug, all you need to do is specify the debug file from the compiler as the program property of the microcontroller on the schematic.
VSM Studio supported toolchains
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