Summary
Proteus Virtual System Modelling (VSM) combines mixed mode SPICE circuit simulation, animated components and microprocessor models to facilitate co-simulation of complete microcontroller based designs.
The ‘Proteus VSM for dsPIC33®’ product includes the following main software modules:
|
|
Proteus VSM for PIC® Bundle products are ideal if you need to simulate more than one family of PIC® micro-controllers.
Variants
The following is a current list of supported variants in the dsPIC33® family:
- dsPIC33FJ12GP201, dsPIC33FJ12GP202, dsPIC33FJ32GP202
- dsPIC33FJ32GP204, dsPIC33FJ16GP304, dsPIC33FJ12MC201
- dsPIC33FJ12MC202, dsPIC33FJ32MC202, dsPIC33FJ32MC204
- dsPIC33FJ16MC304
Features
We believe our simulation models are the most accurate and the most complete on the market today. A summary of model capabilities is listed below:
- Supports simulation of the entire instruction set.
- Supports all port and other I/O pin operations.
- Supports all timers including watchdog timer, sleep mode and wake-up from sleep.
- Supports both Capture-Compare and PWM modules in all modes.
- Supports Parallel Master Port (PMP) module including legacy PSP modes.
- Supports all serial communication peripherals including SPI, I2C and UART.
- Supports Analogue-to-Digital Conversion (ADC) module including support for voltage reference pins.
- Supports Analogue Comparator modules including support for internal and external voltage references.
- Supports Real Time Clock including automatic initialisation from the PC time.
- Supports all interrupt modes including interrupt priorities.
- Support for extended instruction set for appropriate variants.
- Provides internal consistency checks on code (e.g. execution of invalid op-codes, illegal memory accesses, stack overflow checking, etc.).
- Fully integrated in to the VSM source level debugging system.
- Fully integrated into the Proteus Diagnostic Control System.
Limitations
The following is a listing of known limitations in the current version of the dsPIC33®:
- The FOSCEL, FOSCEL, CLKDIV and OSCTUN bits/registers are not supported.
- Loop back and irDA modes are not currently supported.
- The SPI modules do not currently support either “enhanced” mode (FIFO buffering) or “framing” modes (essentially, any feature enabled via SPIxCON2).
- The register PMDx effects are not modelled.
- Brown out detection is not currently modelled.
- Quadrature encode interface – bit QEI1CON Stop in Idle mode not modelled.
- Motor Control PWM – bit PxTCON, PWM Time Base Stop in Idle Mode not modelled.
- ADC with SS&H – only the variant up to 13 analog input pin and without DMA is supported at moment.
Compilers
Supported Third Party Compilers
Proteus VSM models will fundamentally work with the exact same HEX file as you would program the physical device with. However, far more debugging information is available when using a compiler to write the firmware and providing these object files to Proteus in place of the HEX file provides a much richer working environment.
We recommend you use the free Labcenter VSM Studio IDE. This will greatly simplify the task as it will automatically configure supported compilers to work with a Proteus VSM simulation.
If you prefer to work inside your own IDE then you will need to set your compiler options manually. After compiling for debug, all you need to do is specify the debug file from the compiler as the program property of the microcontroller on the schematic.
VSM Studio supported toolchains
|
|
 |
